FIGS. 1A and 1B depict conventional magnetic elements 10 and 10′. Such conventional magnetic elements 10/10′ can be used in non-volatile memories, such as MRAM. The conventional magnetic element 10 is a spin valve and includes a conventional antiferromagnetic (AFM) layer 12, a conventional pinned layer 14, a conventional nonmagnetic spacer layer 16 and a conventional free layer 18. Other layers (not shown), such as seed or capping layer may also be used. The conventional magnetic element 10 also typically has an elliptical shape 11, and thus a shape anisotropy that favors a magnetization that is substantially parallel to the long axis, 1, of the ellipse. The conventional pinned layer 14 and the conventional free layer 18 are ferromagnetic. Thus, the conventional free layer 18 is depicted as having a changeable magnetization 19. The conventional nonmagnetic spacer layer 16 is conductive. The AFM layer 12 is used to fix, or pin, the magnetization of the pinned layer 14 in a particular direction. The magnetization of the free layer 18 is free to rotate, typically in response to an external magnetic field. The conventional magnetic element 10′ depicted in FIG. 1B is a spin tunneling junction. Portions of the conventional spin tunneling junction 10′ are analogous to the conventional spin valve 10. However, the conventional barrier layer 16′ is an insulator that is thin enough for electrons to tunnel through in a conventional spin tunneling junction 10′. Note that only a single spin valve 10 is depicted, one of ordinary skill in the art will readily recognize that dual spin valves including two pinned layers and two nonmagnetic layers separating the pinned layers from the free layer can be used. Similarly, although only a single spin tunneling junction 10′ is depicted, one of ordinary skill in the art will readily recognize that dual spin tunneling including two pinned layers and two barrier layers separating the pinned layers from the free layer, can be used. More recently, structures having two pinned layers and two layers, one barrier and one conductive, separating the pinned layers from the free layers have been developed, particularly for use when exploiting spin transfer in programming.
Depending upon the orientations of the magnetization 19/19′ of the conventional free layer 18/18′ and the conventional pinned layer 14/14′, respectively, the resistance of the conventional magnetic element 10/10′, respectively, changes. When the magnetization 19/19′ of the conventional free layer 18/18′ is parallel to the magnetization of the conventional pinned layer 14/14′, the resistance of the conventional magnetic element 10/10′ is low. When the magnetization 19/19′ of the conventional free layer 18/18′ is antiparallel to the magnetization of the conventional pinned layer 14/14′, the resistance of the conventional magnetic element 10/10′ is high.
To sense the resistance of the conventional magnetic element 10/10′, current is driven through the conventional magnetic element 10/10′. Typically in memory applications, current is driven in a CPP (current perpendicular to the plane) configuration, perpendicular to the layers of conventional magnetic element 10/10′ (up or down, in the z-direction as seen in FIG. 1A or 1B). Based upon the change in resistance, typically measured using the magnitude of the voltage drop across the conventional magnetic element 10/10′, the resistance state and, therefore, the data stored in the conventional magnetic element 10/10′ can be determined.
FIG. 2 depicts a conventional MRAM 50 that uses the magnetic element 10 or 10′. The MRAM 50 includes the magnetic element 10/10′, bit line 52 and word line 54. In conventional MRAM, the conventional magnetic element 10/10′ is written using an in-plane magnetic field that is approximately forty-five degrees from the axis in which the magnetization 19/19′ lie. This magnetic field is typically provided by driving current through two write lines, the bit line 52 and the word line 54, which are oriented perpendicular and which cross in the region of the conventional magnetic element 10/10′. Current driven in the bit line 52 generates a magnetic field that is parallel or antiparallel to the magnetization of the free layer 18/18′. Current driven in the word line 54 generates a magnetic field that is perpendicular to the magnetization 19/19′ of the free layer 18/18′. This magnetic field reduces the field required to be generated by current in the bit line 52 to switch the direction of magnetization 19/19′ of the free layer 18/18′. Thus, the sum of the two magnetic fields generated by currents in the lines 52 and 54 allows the magnetization 19/19′ to be switched. Depending upon the direction of the magnetic field, the magnetization 19/19′ of the free layer 18/18′ can be switched to have an equilibrium position parallel or antiparallel to the magnetization of the pinned layer 14/14′.
Although the conventional magnetic elements 10/10′ can be used to store data in an MRAM, one of ordinary skill in the art will readily recognize that there are a number of drawbacks. Of these, the primary issues include poor write selectivity and a high write current required to write to the conventional magnetic elements 10/10′. Typically, a magnetic cell includes the conventional magnetic element 10/10′ and other element(s), such as a selection transistor. Poor write selectivity results in memory cells in addition to the desired memory cell being written. These unintentionally written cells are typically located in the regions that either the bit line or word line has passed current through so that the cells encounter magnetic field that the current generates. During manufacturing, defects may be introduced into elements within the memory cells to form pinning sites of magnetization. Manufacturing also results in variations in the size and shape of the conventional magnetic elements 10/10′, as well as other portions of the memory cell. The pinning sites usually cause local sub-domain formation and drag the magnetization switching. It essentially broadens the switching field distribution. The variations in the memory cell size and shape cause variations in the internal demagnetizing field. The magnetic field produced within the memory cell (internal magnetic field) may vary widely from cell to cell. The variations in the internal magnetic field mean that the magnetic field required to switch the free layer magnetization 19/19′ of a particular magnetic cell (required write field) varies from cell to cell. Variations in the required write field mean that unintentional switching could happen for those cells with lower switching fields (required write fields) even they only encounter a single-direction magnetic field from either bit line or word line current. Consequently, unintentional cell writing may occur. Thus, defects and variations in the memory cell size and shape may result in a large distribution in the required write field and unintentional cell writing. This, in the memory application, makes it hard to find the operation window of the switching currents and causes reliability problems.
Writing to conventional magnetic cells may also require a larger write current, which is undesirable. As the memory application goes for higher capacity and thus higher memory cell density, the cell size needs to be reduced in order to accommodate more cells within limited chip area. On the other hand, while the cell size decreases, the required switching field increases rapidly. A higher applied magnetic field requires a higher current to be driven through the write lines. This higher current is undesirable, for example due to increased power consumption. In addition, for the more advanced technology node, the maximum current that the metal lines could sustain is limited due to the reduced metal line cross-section.
Efforts have been made to address issues, for example in toggle writing. In one scheme, stray fields from unbalanced synthetic layers in a conventional magnetic element 10/10′ are used to reduce the switching field. However, one of ordinary skill in the art will recognize that such schemes have drawbacks. For example, stray fields may not be uniform across a cell or among cells. In particular, stray fields at the edges of a memory cell may be quite large. Consequently, a loss of writing integrity may occur. In addition, the stray fields are typically quite sensitive to the shape, size, and wall profile for a magnetic memory element. As a result, the biasing from stray fields may be difficult to control.
Accordingly, what is needed is a system and method for providing a magnetic memory element that can be switched using a lower current and that has improved switching characteristics. The present invention addresses such a need.